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Baseband Receiver Design for Wireless MIMO-OFDM Communications
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Preface xiii About the Authors xvii Acknowledgements xix List of Abbreviations and Acronyms xxi PART ONE: FUNDAMENTALS OF WIRELESS COMMUNICATION 1. Introduction 3 1.1 Digital Broadcasting Systems 3 1.1.1 Digital Audio Broadcasting (DAB) 4 1.1.2 Digital Video Broadcasting (DVB) 4 1.2 Mobile Cellular Systems 6 1.2.1 Carrier Aggregation 8 1.2.2 Multiple-Antenna Configuration 8 1.2.3 Relay Transmission 9 1.2.4 Coordinated Multipoint Transmission and Reception (CoMP) 9 1.3 Wireless Network Systems 10 1.3.1 Personal Area Network (PAN) 10 1.3.2 Local Area Network (LAN) 12 1.3.3 Metropolitan Area Network (MAN) 13 1.3.4 Wide Area Network (WAN) 14 Summary 14 References 15 2. Digital Modulation 17 2.1 Single-Carrier Modulation 17 2.1.1 Power Spectral Densities of Modulation Signals 18 2.1.2 PSK, QAM, and ASK 19 2.1.3 CPFSK and MSK 22 2.1.4 Pulse Shaping and Windowing 23 2.2 Multi-Carrier Modulation 24 2.2.1 Orthogonal Frequency-Division Multiplexing 27 2.2.2 OFDM Related Issues 27 2.2.3 OFDM Transceiver Architecture 31 2.3 Adaptive OFDM 33 Summary 37 References 37 3. AdvancedWireless Technology 39 3.1 Multiple-Input Multiple-Output (MIMO) 39 3.1.1 Introduction 39 3.1.2 MIMO Basics 41 3.1.3 MIMO Techniques 43 3.1.4 MIMO-OFDM System Example 50 3.2 Multiple Access 53 3.2.1 Frequency-Division Multiple Access (FDMA) 54 3.2.2 Time-Division Multiple Access (TDMA) 54 3.2.3 Code-Division Multiple Access (CDMA) 55 3.2.4 Carrier Sense Multiple Access (CSMA) 57 3.2.5 Orthogonal Frequency-Division Multiple Access (OFDMA) 57 3.2.6 Space-Division Multiple Access (SDMA) 58 3.3 Spread Spectrum and CDMA 59 3.3.1 PN Codes 60 3.3.2 Direct-Sequence Spread Spectrum 63 3.3.3 Frequency-Hopping Spread Spectrum 65 Summary 66 References 67 4. Error-Correcting Codes 69 4.1 Introduction 69 4.2 Block Codes 70 4.2.1 Linear Codes 70 4.2.2 Cyclic Codes 72 4.3 Reed?Solomon Codes 73 4.3.1 Finite Fields 74 4.3.2 Encoding 75 4.3.3 Decoding 76 4.3.4 Shortened Reed?Solomon Codes 76 4.4 Convolutional Codes 77 4.4.1 Encoding 77 4.4.2 Viterbi Decoder 79 4.4.3 Punctured Convolutional Codes 80 4.5 Soft-Input Soft-Output Decoding Algorithms 81 4.5.1 MAP Decoder 82 4.5.2 Log-MAP Decoder 85 4.5.3 Max-Log-MAP Decoder 86 4.6 Turbo Codes 87 4.6.1 Encoding 87 4.6.2 Decoding 88 4.7 Low-Density Parity-Check Codes 89 4.7.1 Encoding 89 4.7.2 Decoding 91 Summary 93 References 94 5. Signal Propagation and Channel Model 95 5.1 Introduction 95 5.2 Wireless Channel Propagation 96 5.2.1 Path Loss and Shadowing 96 5.2.2 Multipath Fading 97 5.2.3 Multipath Channel Parameters 98 5.2.4 MIMO Channel 104 5.3 Front-End Electronics Effects 105 5.3.1 Carrier Frequency Offset 105 5.3.2 Sampling Clock Offset 106 5.3.3 Phase Noise 106 5.3.4 IQ Imbalance and DC Offset 107 5.3.5 Power Amplifier Nonlinearity 110 5.4 Channel Model 111 5.4.1 Model for Front-End Impairments 112 5.4.2 Multipath Rayleigh Fader Model 113 5.4.3 Channel Models Used in Standards 116 Summary 122 References 123 PART TWO: MIMO-OFDM RECEIVER PROCESSING 6. Synchronization 127 6.1 Introduction 127 6.2 Synchronization Issues 128 6.2.1 Synchronization Errors 128 6.2.2 Effects of Synchronization Errors 128 6.2.3 Consideration for Estimation and Compensation 133 6.3 Detection and Estimation of Synchronization Errors 134 6.3.1 Symbol Timing Detection 134 6.3.2 Carrier Frequency Offset Estimation 143 6.3.3 Residual CFO and SCO Estimation 147 6.3.4 Carrier Phase Estimation 149 6.3.5 IQ Imbalance Estimation 150 6.4 Detection and Estimation of Synchronization Errors in MIMO-OFDM Systems 153 6.4.1 Symbol Timing Detection in MIMO-OFDM Systems 153 6.4.2 Carrier Frequency Offset Estimation in MIMO-OFDM Systems 155 6.4.3 Residual CFO and SCO Estimation in MIMO-OFDM Systems 156 6.4.4 Carrier Phase Estimation in MIMO-OFDM Systems 157 6.4.5 IQ Imbalance Estimation in MIMO-OFDM Systems 157 6.5 Recovery of Synchronization Errors 158 6.5.1 Carrier Frequency Offset Compensation 158 6.5.2 Sampling Clock Offset and Common Phase Error Compensation 160 6.5.3 IQ Imbalance Compensation 163 Summary 163 References 164 7. Channel Estimation and Equalization 167 7.1 Introduction 167 7.2 Pilot Pattern 168 7.2.1 Pilot Pattern in SISO-OFDM Systems 168 7.2.2 Pilot Pattern in MIMO-OFDM Systems 171 7.3 SISO-OFDM Channel Estimation 174 7.3.1 Channel Estimation by Block-Type Pilot Symbols 177 7.3.2 Channel Estimation by Comb-Type Pilot Symbols 179 7.3.3 Channel Estimation by Grid-Type Pilot Symbols 186 7.4 MIMO-OFDM Channel Estimation 191 7.4.1 Space?Time Pilot 191 7.5 Adaptive Channel Estimation 194 7.6 Equalization 195 7.6.1 One-Tap Equalizer 195 7.6.2 Multi-Tap Equalizer 198 7.7 Iterative Receiver 204 7.7.1 Iterative Synchronization and Channel Estimation 205 7.7.2 Bit-Interleaved Coded Modulation with Iterative Decoding (BICM-ID) 205 Summary 206 References 207 8. MIMO Detection 209 8.1 Introduction 209 8.2 Linear Detection 210 8.2.1 Zero Forcing (ZF) 210 8.2.2 Minimum Mean Squared Error (MMSE) 211 8.3 MIMO Detection with Channel Preprocessing 212 8.3.1 Sorting 212 8.3.2 QR Decomposition 213 8.3.3 MMSE-SQRD 215 8.3.4 Ordered Successive Interference Cancelation (OSIC) 216 8.3.5 Lattice Reduction (LR) 218 8.4 Sphere Decoder 220 8.4.1 Depth-First Tree Search 221 8.4.2 Breadth-First Tree Search 223 8.4.3 Best-First Tree Search 224 8.4.4 Complexity Measurement 227 8.4.5 Design Space Exploration of Sphere Decoder 227 8.5 Soft-Output Sphere Decoder 230 8.5.1 Repeated Tree Search 231 8.5.2 Single Tree Search 232 8.5.3 LLR Clipping 232 8.6 Iterative MIMO Detection 234 8.6.1 List Sphere Decoder 234 8.6.2 Soft-Input Soft-Output Sphere Decoder 235 8.6.3 Iterative SIC-MMSE Detection 237 8.7 Precoding 239 8.7.1 Beam Steering 239 8.7.2 Spatial Decorrelation 241 8.7.3 Limited Feedback 244 8.8 Space Block Code 246 Summary 247 References 248 PART THREE: HARDWARE DESIGN FOR MIMO-OFDM RECEIVERS 9. Circuit Techniques 253 9.1 Introduction 253 9.2 Fast Fourier Transform Modules 253 9.2.1 FFT Algorithms 254 9.2.2 Architecture 259 9.2.3 Comparison 264 9.3 Delay Buffer 267 9.3.1 SRAM/Register File-Based Delay Buffer 267 9.3.2 Pointer-Based Delay Buffer 268 9.3.3 Gated Clock Strategy 269 9.3.4 Comparison 272 9.4 Circuits for Rectangular-to-Polar Conversion 274 9.4.1 Arctangent Function 274 9.4.2 Magnitude Function 279 9.4.3 Comparison 286 9.5 Circuits for Polar-to-Rectangular Conversion 286 9.5.1 Trigonometric Approximation 287 9.5.2 Polynomial Approximation 288 9.5.3 Comparison 290 Summary 290 References 291 10. MIMO IC Design Examples 293 10.1 Introduction 293 10.2 QR Decomposition IC 294 10.2.1 System Description 294 10.2.2 Algorithm Design 295 10.2.3 Architecture Design 300 10.2.4 Experimental Results 303 10.3 8 x 8 Soft-Output Sphere Decoder 306 10.3.1 Block Description 306 10.3.2 Algorithm Design 306 10.3.3 Architecture Design 307 10.3.4 Experimental Results 316 Summary 318 References 319 11. Mobile MIMO WiMAX System-on-Chip Design 321 11.1 Introduction of WiMAX Standard 321 11.2 Mobile WiMAX OFDMA and Frame Structure 322 11.3 WiMAX Baseband Receiver Design 325 11.3.1 Automatic Gain Control (AGC) 325 11.3.2 Packet Detection (PKD) 326 11.3.3 Symbol Timing Recovery (STR) 328 11.3.4 Carrier Frequency Offset (CFO) Compensation 328 11.3.5 Channel Estimation 330 11.3.6 MIMO Detection 330 11.3.7 Outer Receiver 333 11.4 WiMAX Media Access Control (MAC) Design 333 11.5 Implementation and Field Trial of the WiMAX SoC 336 11.5.1 Laboratory Testing and Performance Evaluation 338 11.5.2 Taiwan High Speed Rail Field Trial 340 Summary 341 References 341 Index 343

About the Author

Tzi-Dar Chiueh, National Taiwan University, Taiwan Tzi-Dar Chiueh is a Professor of Electrical Engineeringat National Taiwan University and Director General of the NationalChip Implementation Center in Hsinchu, Taiwan. He has also heldvisiting positions at ETH Zurich Switzerland at State University ofNew York at Stony Brook. Chiueh has won numerous awards, includingthe Acer Long-Term (11 times), the Golden Silicon Award (2002,2005, 2007, and 2009), NTU Teaching Excellence Award (2002, 2003,2005, 2006, 2007, and 2010), National Science Council's OutstandingResearch Award (2004 2007), Chinese Institute of ElectricalEngineers' Outstanding Electrical Engineering Professor, NTU HimaxChair Professorship (2006), and the Ministry of Economic Affairs'Outstanding Industry Contribution Award (2009). He holds a B.S. inElectrical Engineering from National Taiwan University, and an M.Sand PhD in Electrical Engineering from the California Institute ofTechnology. Pei-Yun Tsai, National Central University, Taiwan Pei-Yun Tsai is an Assistant Professor in ElectricalEngineering at National Central University. Her research interestsare digital baseband communication algorithms, MIMO techniques, andlow-power IC/architecture implementation for telecommunicationsreceivers. Tsai has won a number chipset design awards. She holds aB.S, M.S. and PhD in electrical engineering from National TaiwanUniversity. I-Wei Lai, National Taiwan University, Taiwan I-Wei Lai is with the Microsystem Research Lab atNational Taiwan University. His research interests include basebandsignal processing algorithms and VLSI design.

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