List of Figures. List of Tables. Preface. 1. Introduction. 2. Basic Transmission Line Theory. 3. Evaluating the Transient Response of Linear Networks. 4. Mosfet Current-Voltage Characteristics. 5. Figures of Merit to Characterize the Importance of on-Chip Inductance in Single Lines. 6. Effects of Inductance on the Propagation Delay and Repeater Insertion Process in RLC Lines. 7. Equivalent Elmore Delay for RLC Trees. 8. Characterizing Inductance Effects in RLC Trees. 9. Repeater Insertion in Tree Structured Inductive Interconnect. 10. Dynamic and Short-Circuit Power of CMOS Gates Driving Lossless Transmission Lines. 11. Exploiting On-Chip Inductance in High Speed Clock Distribution Networks. 12. Accurate and Efficient Evaluation of the Transient Response in RLC Circuits: The DTT Method. 13. On the Extraction of On-Chip Inductance. 14. Conclusions. Bibliography. Appendices. Index. About the Authors.
Springer Book Archives