Table of Contents

Chapter 1: IntroductionChapter 2: BackgroundChapter 3: Hardware ModelingChapter 4: Architectural SynthesisChapter 5: Scheduling AlgorithmsChapter 6: Resource Sharing and BindingChapter 7: Two-Level Combinational Logic OptimizationChapter 8: Multiple-Level Combinational Logic OptimizationChapter 9: Sequential Logic OptimizationChapter 10: Cell-library BindingChapter 11: State-of-the-art and Future Trends

About the Author

Giovani De Micheli is Associate Professor of Electrical Engineering and, by courtesy, of Computer Science at Stanoford University. from 1984 to 1986 he worked at the IBM T.J. Waston Research Center. Yorktown Heights, where he was project leader of the Design Automation Workstation group. previously he held positions at the Department of Electronics of the Politecnico di Milano, Italy and at Harris Semiconductor,Melbourne, florida . He holds a Nuclear Engineer degree and a Ph.D degree in electrical engineering and Computer Science.