2. The Devices. Appendix A. Layout Design Rules. Appendix B. Small-Signal Models. 3. The Inverter. 4. Designing Combinational Logic Gates in CMOS. Appendix C. Layout Techniques for Complex Gates. 5. Very High Performance Digital Circuits. Appendix D. The Schottky-Barrier Diode. 6. Designing Sequential Logic Circuits.
II. A SYSTEMS PERSPECTIVE.
7. Designing Arithmetic Building Blocks. Appendix E. From Datapath Schematics to Layout. 8. Coping with Interconnect. 9. Timing Issues in Digital Circuits. 10. Designing Memory and Array Structures. 11. Design Methodologies. Problem Solutions. Index.
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